Delay Compensation in HILS of Aerospace Systems

Abstract

Embedded systems of Aerospace vehicles can be developed and evaluated using a testing technique which is used increasingly known as Hardware In Loop Simulation (HILS). HIL simulation provides an effective platform for real time embedded systems development and testing. We can add the complexity of the plant under control to the test platform by adding mathematical models of all related dynamic systems. The set of all these mathematical models are known as “simulated plant’’. The other emulated systems will be as interfaces between the Simulated plant and the Embedded system. The emulated systems will be excited by the Simulated plant and their response will be given to Embedded system under test. All these systems in the HILS testbed causes considerable delay. To compensate for this delay, different methods were proposed earlier. This paper describes those methods and suggests suitable method to be implemented.