Study on the Output Low-Level Property of the SN74LS00N Chip

Xiao-dong LIU, Jian-long FU, Li-ping TU

Abstract


Generally, the load capacity of the integrated gate circuit depends on its output low-level property. This paper gives a theoretical and experimental study on the output low-level volt-ampere property of the current popular TTL NAND-gate SN74LS00N, and the true output property model and reasonable parameters that are considered to be inconsistent with those in relevant classical textbooks. In addition, with the actual measurement of the change of the power supply current of each gate under different logic states, the method and specific values of the key circuit parameters of the internal part of the integrated circuit—the input stage resistor R1 and the inverting stage pull-up resistor R2—are given. This will play an active role in understanding the TTL 74LS series of electronic device circuits and their experimental teaching, related electronic engineering design, as well as the writing, publishing and teaching of the textbooks.

Keywords


TTL gate, SN74LS00N, Low-level output property, Threshold voltage.


DOI
10.12783/dtcse/ica2019/30779

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